NE555 timer

The bipolar 555 timer: the chip in every beginner's kit, modeled down to its own internal comparators and flip-flop.

Inside a real NE555 are three 5 kohm resistors from VCC to GND (which is where the name comes from), two comparators watching the taps of that divider, an RS flip-flop, an open-collector discharge transistor and a totem-pole output, and that is all this part is. The RC network that actually sets the timing is built out of a real resistor and capacitor on the canvas, exactly as it is on a breadboard.

Pins

Pin	What it does
GND	0 V reference.
TRIG	Sets the flip-flop when it falls below a third of the supply.
OUT	High or low, a bipolar totem-pole output.
RESET	Below about 0.7 V, forces the output low regardless of the comparators.
CTRL	The upper threshold tap: normally two-thirds of the supply, movable.
THR	Resets the flip-flop when it rises above the upper threshold.
DIS	Open-collector, saturated to GND while the output is low.
VCC	Supply, 4.5 V or more.

Properties

None. Every behavior comes from the pins and the external RC network.

What the model gets right

CTRL really is the control pin: the chip drives it with its own internal divider, so a decoupling capacitor there behaves as it does on the bench, and forcing a voltage onto CTRL genuinely moves both trip points. Below 4.5 V the chip is not running and OUT/DIS go high impedance, the way an unplugged chip would. OUT's high is a diode drop and a transistor drop below the rail (about 3.3 V on a 5 V supply) because it is a real bipolar totem pole, not an idealized rail-to-rail driver. The timing accuracy is the capacitor's, not the chip's, and the capacitor is solved by the matrix rather than stepped: a textbook astable measures 0.05% fast against 1.44 / ((RA + 2 RB) C) at 4.7 k, 10 k and 47 k of RB alike, held by a test in crates/parts/src/parts/ne555.rs.

What it does not model

The monostable used to run about 1.7% short and does not now. A textbook one-shot on 10 k and 10 uF should run for RC ln 3 = 109.8 ms; until September 17, 2026 it ran for 108.0, and it now runs for 109.8, within a twentieth of a percent, the same figure the astable holds. The fault was never the 555: it was in the analog solver, which ran one integration step ahead of the rest of the simulation, so anything that happened inside that step (a button contact bouncing, for instance, which is exactly how a one-shot is started) moved the clock back to the event without moving the capacitor's charge back with it. The capacitor kept a step's worth of charge it had not been given the time to collect, once per bounce. It is fixed, and both the monostable and the astable are now held to 1% by tests that run the real circuits.

The discharge transistor's 10 ohms is not in the textbook formula, and it is in this model. Where RA is small (a 1 k RA against a 10 k RB), that 10 ohms moves the frequency about 1% below what 1.44 / ((RA + 2 RB) C) says. The model is right and the formula is the approximation, but a lesson that checks the formula to better than a percent should know which of the two it is testing.

The output levels are fixed numbers rather than load-dependent ones: the high is always VCC − 1.7 V and the low always 0.1 V, where a real bipolar 555's drops depend on how much current the pin is passing. The comparator delay is a flat 100 ns from a crossing to the pin, inertial, which is the datasheet's output rise and fall time standing in for the whole path. Below 4.5 V of supply the chip simply stops rather than degrading, and there is no supply current, no internal noise, no temperature drift of the trip points, and no CMOS-variant (7555) behavior.

Common mistakes

Leaving RESET floating and expecting the output to run. Below about 0.7 V RESET forces the flip-flop clear, so a RESET that is not tied to VCC may hold the chip off entirely rather than doing nothing.

See it in action

555 blinker is the astable the chip was built for, complete with a switch that changes the blink rate live. Open it at /templates.

The 555 monostable page wires the chip as a one-shot timer and times the 1.1 s pulse that 100 k and 10 uF give.