MCP4131 digital potentiometer

The MCP4131 digital potentiometer: a real 5k to 100k resistor in a DIP-8 whose wiper a sketch sets over SPI in 129 steps.

Aliases: MCP4131, MCP4131-103, MCP41x1, digital pot, digipot, SPI potentiometer.

A pot with no knob. P0A and P0B are the two ends of the track and P0W is the wiper, and the sketch moves it: 0 puts the wiper at P0B, 128 at P0A, and it powers up in the middle, at 64. Wire the ends to 5V and GND and the wiper is a voltage; use one end and the wiper and it is a variable resistor. It needs no library: two SPI.transfer() calls set it.

#include <SPI.h>

const int CS_PIN = 10;

void setWiper(byte value) {
  digitalWrite(CS_PIN, LOW);
  SPI.transfer(0x00);   // address 0, the wiper, write
  SPI.transfer(value);  // 0 to 128
  digitalWrite(CS_PIN, HIGH);
}

void setup() {
  pinMode(CS_PIN, OUTPUT);
  digitalWrite(CS_PIN, HIGH);
  SPI.begin();
  setWiper(32);         // a quarter of the way from P0B
}

void loop() {}

Pins

Pin	What it does
CS	Chip select, active low.
SCK	SPI clock.
SDI	The shared SDI/SDO pin: data in from MOSI, and out during a read.
VSS	Ground.
P0A	One end of the track: the wiper is here at 128.
P0W	The wiper.
P0B	The other end: the wiper is here at 0.
VDD	Supply, 1.8 to 5.5 V.

The track's ends must stay between VSS and VDD.

Properties

value is the track, P0A to P0B: 5k, 10k (the MCP4131-103, the usual one), 50k or 100k.

What the model gets right

It is a resistor. The ladder and the wiper switch are in the circuit as the datasheet draws them: P0W to P0B is value x N / 128 + 75 ohm, the 75 ohm being the wiper switch, and P0A to P0B is the whole track whatever the wiper does. A load on the wiper, an LED in series, or a meter across two pins sees what it would on the bench.

The commands. Write, read, increment and decrement of the wiper (address 0), and write and read of the TCON register (address 4), which disconnects P0A, P0W or P0B, or puts the pot in its shutdown state (A open, the wiper on B). The STATUS register (address 5) reads. Increments stop at 128 and decrements at 0, and a value over 128 is full scale. Several commands can follow one another while CS is low. SPI modes 0 and 3 both work.

The shared pin. On the MCP4131 SDI and SDO are one pin. The chip drives it only for the command error bit (CMDERR) and a read's data bits, open drain. An invalid command, such as a reserved address or an increment of TCON, pulls the pin low and the chip ignores everything until CS rises. To read the wiper back, wire MOSI to the pin through a resistor (1k to 10k) and MISO straight to it, then send 0x0F and 0xFF: the low nine bits of the reply are the wiper.

What it does not model

The wiper resistance's change with supply and current (75 ohm is the 5 V figure), the track's 20 % tolerance and its temperature drift, bandwidth, the high-voltage commands, and the internal pull-ups on CS and the shared pin while nothing drives them. Unpowered, the real chip's switches are undefined; here the three terminals are open.

Common mistakes

Sending the value without the command byte first: one SPI.transfer(value) is half a command, and the chip drops it when CS rises.

Expecting 0 to 255: the MCP4131 has 129 steps, 0 to 128. The MCP4151 is the 8-bit one.