74HC02 quad NOR gate
Four two-input NOR gates in a 14-pin package: the output is high only when both inputs are low.
A NOR is as universal as a NAND (any logic can be built from NORs alone), and two of them cross-coupled make an SR latch. Aliases: 7402, SN74HC02, quad NOR, NOR gate.
The pinout is not the 74HC00's. Every other quad gate here puts the inputs first and the output third; the 7402 puts the output first on each gate. Dropping a 7402 into a circuit wired for a 7400 drives its outputs into what were meant to be inputs.
Pins
| Pin | Name | What it does |
|---|---|---|
| 1, 4, 10, 13 | 1Y to 4Y |
Outputs. |
| 2, 3 | 1A, 1B |
Gate 1 inputs. |
| 5, 6 | 2A, 2B |
Gate 2 inputs. |
| 8, 9 | 3A, 3B |
Gate 3 inputs. |
| 11, 12 | 4A, 4B |
Gate 4 inputs. |
| 7 | GND |
Ground. |
| 14 | VCC |
Supply, 2 V to 6 V. |
Truth table
A |
B |
Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
Tie both inputs of a gate together and it is an inverter; follow a NOR with an inverter and it is an OR.
Properties
None.
What the model gets right
A 1 on either input decides the output (low), so a gate with one input high and the other floating still gives a defined low. Propagation delay is the SN74HC02 data sheet typical, 9 ns at 4.5 V, and it is inertial: a pulse shorter than that never reaches the output. The rest of the model is the same as the other 74HC gates.
What it does not model
One delay for every gate and both directions, with no dependence on supply voltage or load; no supply current.
Common mistakes
Wiring it like a 7400. Leaving inputs floating: a NOR with both inputs floating, or one low and one floating, gives an unknown output.
See it in action
Up/down counter uses the four gates of a 74HC02 to steer a clock into one of the 74HC193's two clock inputs. Open it at /templates.