Logic gate (ideal)

One ideal two-input logic gate: a teaching part, not a chip, with no supply pins to wire up first.

function picks which of the six two-input functions it performs (AND, OR, NAND, NOR, XOR or XNOR), and the canvas draws the matching ANSI symbol so a circuit reads the way a textbook schematic does.

Pins

Pin	What it does
A	Input.
B	Input.
Y	The function of A and B.

Properties

function: and, or, nand, nor, xor or xnor.

What the model gets right

Because it has no supply pins, it drives Y from nowhere, the way clock does. There is no "unpowered" state to worry about, which is exactly why it is the part to reach for while teaching boolean logic itself rather than the behavior of a real chip. An input that is unknown or floating still gives a sensible answer when it could not change the result (an AND or NAND with a 0 on the other input, or an OR or NOR with a 1, answers anyway), which is the controlling-value rule every real gate follows too.

What it does not model

No supply, so no unpowered high-impedance state. Its propagation delay is a flat 10 ns that comes from nowhere, not from any datasheet, and the same 10 ns for all six functions, where a real XOR is slower than a real NAND. It is inertial, so a pulse narrower than 10 ns is swallowed, but the number itself is a round one chosen so the part has a delay at all. There is no rise or fall time, no fan-out limit and no supply dependence, because there is no supply. For a chip that behaves the way an actual 74HC part does, with real supply pins and a delay off its own datasheet, see the 74HC logic family.

Common mistakes

Reaching for this part when the lesson is about a real chip's power pins, its propagation delay, or what happens when it is left unpowered. Those all need the real 74HC parts, not the ideal ones.

See it in action

Gate lab and Full adder are both built entirely from ideal gates. See them at /templates.