74HC decoders, encoders and multiplexers

Decoders, priority encoders and multiplexers: the 74HC139, 154, 42, 147, 148, 151, 153 and 157.

They turn a binary number into one line, one line into a binary number, or a binary number into a choice between inputs.

They are the relatives of the 74HC138 and work the same way: no clock, every output worked out from the inputs as they are now, after one propagation delay. The decoder and encoder outputs are active low: the selected line is the one that goes low. Aliases: 74139, 74154, 7442, 74147, 74148, 74151, 74153, 74157, SN74HC139, CD74HC154, SN74HC151, 74LS138 family, 2-to-4 decoder, 4-to-16 decoder, BCD to decimal decoder, priority encoder, multiplexer, mux, data selector.

74HC139: dual 2-to-4 line decoder

Two independent decoders. Each takes a 2-bit address (nB nA, nA the 1s bit) and pulls the matching one of nY0 to nY3 low; the other three stay high. Each half has an active-low enable nG: high holds all four outputs high. Propagation delay: 14 ns, the SN74HC139 typical from an address at 4.5 V and 50 pF.

Pin	Name	What it does
1	1G	Decoder 1 enable, active low.
2, 3	1A, 1B	Decoder 1 address, 1A the 1s bit.
4 to 7	1Y0 to 1Y3	Decoder 1 outputs, active low.
15	2G	Decoder 2 enable, active low.
14, 13	2A, 2B	Decoder 2 address, 2A the 1s bit.
12 to 9	2Y0 to 2Y3	Decoder 2 outputs, active low.
8	GND	Ground.
16	VCC	Supply.

74HC154: 4-to-16 line decoder

A 4-bit address A3 to A0 pulls the matching one of sixteen outputs low. Both active-low enables, E1 and E2, have to be low; with either high every output is high. It is a 24-pin DIP, 0.6 inch wide, so it straddles a breadboard's center gap with room to spare. Propagation delay: 14 ns, the CD74HC154 typical at 5 V and 15 pF.

Pin	Name	What it does
23, 22, 21, 20	A0 to A3	The address, A0 the 1s bit.
1 to 11	Y0 to Y10	Outputs, active low.
13 to 17	Y11 to Y15	Outputs, active low.
18, 19	E1, E2	Enables, active low. Both must be low.
12	GND	Ground.
24	VCC	Supply.

74HC42: BCD to decimal decoder

A BCD digit on A3 to A0 pulls the matching one of ten outputs, Y0 to Y9, low. The six codes past 9 are invalid and leave every output high. There is no enable. Propagation delay: 12 ns, the CD74HC42 typical at 5 V and 15 pF.

Pin	Name	What it does
15, 14, 13, 12	A0 to A3	The BCD digit, A0 the 1s bit.
1 to 7	Y0 to Y6	Outputs, active low.
9, 10, 11	Y7 to Y9	Outputs, active low.
8	GND	Ground.
16	VCC	Supply.

74HC147: 10-to-4 line priority encoder

Nine active-low inputs, I1 to I9, in; the number of the highest one that is low out, as an inverted BCD code on Y0 to Y3. I9 has the highest priority, so pressing keys 3 and 7 together gives 7. There is no I0: with every input high the outputs are all high, which is 0 inverted. Propagation delay: 13 ns, the CD74HC147 typical at 5 V and 15 pF.

Pin	Name	What it does
11, 12, 13	I1, I2, I3	Inputs, active low.
1 to 5	I4 to I8	Inputs, active low.
10	I9	Input, active low, highest priority.
9, 7, 6, 14	Y0 to Y3	The inverted BCD code, Y0 the 1s bit.
15	NC	Not connected.
8	GND	Ground.
16	VCC	Supply.

Highest input that is low	Y3 Y2 Y1 Y0
None	1111
I1	1110
I5	1010
I9	0110

74HC148: 8-to-3 line priority encoder

Eight active-low inputs, I0 to I7, in; the number of the highest one that is low out, inverted, on A0 to A2. I7 has the highest priority. Propagation delay: 23 ns, the SN74HC148 typical from an input to A0 to A2 at 4.5 V and 50 pF.

Pin	Name	What it does
10 to 13	I0 to I3	Inputs, active low.
1 to 4	I4 to I7	Inputs, active low. I7 has the highest priority.
9, 7, 6	A0, A1, A2	The inverted code, A0 the 1s bit.
5	EI	Enable in, active low.
14	GS	Group select: low when enabled and any input is low.
15	EO	Enable out: low when enabled and no input is low.
8	GND	Ground.
16	VCC	Supply.

EI	Inputs	A2 A1 A0	GS	EO
1	x	111	1	1
0	all high	111	1	0
0	I0 low, the rest high	111	0	1
0	highest low is I5	010	0	1
0	I7 low	000	0	1

GS is what tells "input 0 is pressed" apart from "nothing is pressed", since both give 111. Wire one chip's EO to the next chip's EI and two of them make a 16-line encoder.

74HC151: 8-input multiplexer

Picks one of eight data inputs, D0 to D7, by the address C B A (A the 1s bit), and puts it on Y and its complement on W. G is an active-low strobe: with G high, Y is low and W high whatever is selected. Propagation delay: 23 ns, the SN74HC151 typical from a data input at 4.5 V and 50 pF.

Pin	Name	What it does
4, 3, 2, 1	D0 to D3	Data inputs.
15, 14, 13, 12	D4 to D7	Data inputs.
11, 10, 9	A, B, C	The address, A the 1s bit.
7	G	Strobe, active low.
5	Y	The selected input.
6	W	The selected input, inverted.
8	GND	Ground.
16	VCC	Supply.

Wire the address to three switches and the data inputs to VCC or GND and the chip is any function of three inputs you like: the eight data pins are its truth table.

74HC153: dual 4-input multiplexer

Two 4-to-1 multiplexers sharing one address, B A (A the 1s bit). Each puts its addressed nC0 to nC3 on nY. Each half has its own active-low strobe nG: high forces that half's Y low. Propagation delay: 17 ns, the SN74HC153 typical from a data input at 4.5 V and 50 pF.

Pin	Name	What it does
14, 2	A, B	The shared address, A the 1s bit.
6, 5, 4, 3	1C0 to 1C3	Mux 1 data inputs.
1	1G	Mux 1 strobe, active low.
7	1Y	Mux 1 output.
10, 11, 12, 13	2C0 to 2C3	Mux 2 data inputs.
15	2G	Mux 2 strobe, active low.
9	2Y	Mux 2 output.
8	GND	Ground.
16	VCC	Supply.

74HC157: quad 2-input multiplexer

Four 2-to-1 multiplexers sharing a select S and an active-low enable E. S low puts each nI0 on nY, S high each nI1: one switch picks which of two 4-bit numbers goes through. With E high every Y is low. Propagation delay: 13 ns, the SN74HC157 typical from a data input at 4.5 V and 50 pF.

Pin	Name	What it does
1	S	Select. Low picks the I0 inputs, high the I1 inputs.
15	E	Enable, active low.
2, 3	1I0, 1I1	Mux 1 inputs.
4	1Y	Mux 1 output.
5, 6	2I0, 2I1	Mux 2 inputs.
7	2Y	Mux 2 output.
11, 10	3I0, 3I1	Mux 3 inputs.
9	3Y	Mux 3 output.
14, 13	4I0, 4I1	Mux 4 inputs.
12	4Y	Mux 4 output.
8	GND	Ground.
16	VCC	Supply.

Properties

model: each chip offers its 74HC, 74HCT and 74LS versions (for example 74HC151, 74HCT151, 74LS151). The 74HC version runs from 2 V to 6 V and its inputs switch at half the supply. The 74HCT version needs 4.5 V to 5.5 V and its inputs switch at 1.4 V (TTL levels). The 74LS version needs 4.75 V to 5.25 V, switches at 1.4 V, drives an output high only to about 3.4 V, and reads a floating input as high. Pins, logic and delays are the same in every version: the delays are the 74HC figures.

What the model gets right

Every output is worked out separately, so an unknown input only makes unknown the outputs it could change: a decoder with its enable off is all high whatever its address is doing, and a decoder with one floating address pin leaves only the two outputs that pin chooses between unknown. A multiplexer with a floating data input that is not selected gives a clean output. Delays are each data sheet's typical, and inertial.

What it does not model

One delay per chip, the data-to-output figure, for every path. The data sheets give others that are different: on the 74HC151 the address to output is 30 ns and G to output 15 ns; on the 74HC153 the address is 21 ns and G 11 ns; on the 74HC157 the select is 18 ns and E 16 ns; on the 74HC139 an enable is 11 ns; and on the 74HC148 the paths to GS and EO and from EI are 19 to 26 ns. No glitches between addresses: a real decoder can flash another output for a few nanoseconds while its address bits change at slightly different times. With more than 12 inputs unknown at once (a chip not wired up yet) every output is unknown.

Common mistakes

Wiring an LED from a decoder output to ground: the outputs are active low, so the LED goes from VCC through a resistor to the output. Reading an encoder's output as a plain binary number: the 74HC147 and 74HC148 codes are inverted. Forgetting the enables, especially both of the 74HC154's, and leaving the strobe of a 74HC151, 74HC153 or 74HC157 floating (tie it to GND).

See it in action

Browse the example circuits at /templates.