CD4543 seven-segment driver for LCDs and LEDs
A BCD to seven-segment latch and decoder whose phase pin lets it drive common-cathode LEDs, common-anode LEDs or an LCD.
The extra pin, PH (phase), inverts every output, which is what lets the same chip
drive all three kinds of display.
Aliases: 4543, CD4543BE, HEF4543B, MC14543, 74HC4543, CD74HC4543, BCD to 7-segment decoder, LCD driver, display driver.
Pins
| Pin | Name | What it does |
|---|---|---|
| 5, 3, 2, 4 | A, B, C, D |
The BCD input. A is the 1s bit, D the 8s. |
| 9, 10, 11, 12, 13, 15, 14 | a to g |
Segment outputs. |
| 1 | LD |
Latch disable. High: the display follows the inputs. Low: it holds the code it had. |
| 7 | BI |
Blanking, active high. High turns every segment off. |
| 6 | PH |
Phase. High inverts every segment output. |
| 8 | VSS |
Ground. |
| 16 | VDD |
Supply: 3 V to 18 V for the CD4543B, 2 V to 6 V for the 74HC4543. |
Truth table
LD |
BI |
D C B A |
Segments (with PH low) |
|---|---|---|---|
| x | 1 | x | All off |
| 1 | 0 | 0000 to 1001 | The digit 0 to 9 |
| 1 | 0 | 1010 to 1111 | All off |
| 0 | 0 | x | The code that was there when LD went low |
With PH high every output is the inverse of the table: a lit segment is low.
| Digit | Segments lit |
|---|---|
| 0 | a b c d e f |
| 1 | b c |
| 2 | a b d e g |
| 3 | a b c d g |
| 4 | b c f g |
| 5 | a c d f g |
| 6 | a c d e f g |
| 7 | a b c |
| 8 | a b c d e f g |
| 9 | a b c d f g |
Unlike the CD4511's, the 4543's 6 and 9 have their tails.
Which display, which phase
- Common-cathode LED display: tie
PHlow. A lit segment's output is high. - Common-anode LED display: tie
PHhigh. A lit segment's output is low. - LCD: drive
PHand the display's backplane with the same square wave. Each lit segment then sees an AC voltage and each unlit one none, which is what an LCD needs.
Properties
model, which chip it is:
- CD4543B (the default): 3 V to 18 V, outputs of a few hundred ohms (2000 /
VDDohms, about 400 ohms at 5 V), and a delay of about 550 ns at 5 V (the average of the data sheet's 600 ns fall and 500 ns rise), shrinking as the supply rises. - 74HC4543: the same pins and logic, 2 V to 6 V, strong 74HC outputs, and a 28 ns delay (the CD74HC4543 typical at 5 V and 15 pF).
What the model gets right
An unknown input only clouds the segments it could change: with A, B and C low
and D floating, the code is 0 or 8, which differ only in segment g, so only g
shows unknown. A floating LD keeps known only the latch bits that would be the same
whether it latched or not. On the CD4543B the outputs are as weak as a real
4000-series output, so an LED on a segment glows rather than blazes.
What it does not model
An LCD's own response: the segment outputs are logic levels, and nothing here averages the AC drive the way a liquid crystal does. It powers up holding 0 in the latch. No setup or hold time on the latch, and one delay for every path. No current limit on the outputs.
Common mistakes
Getting BI the wrong way up: it is active high here (on the CD4511 it is active
low), so tie it to VSS to see anything. Leaving LD low (or floating) and wondering
why the display never changes: tie it to VDD for a display that follows the inputs.
Wiring a common-anode display with PH low, which lights every segment except the
ones you want. Leaving out the segment resistors on an LED display.
See it in action
Browse the example circuits at /templates.