555 Timer Blinker: Wiring, Formula and Live Circuit

At a glance

The NE555 timer in brief

What it is, and where it sits on the bench.

The NE555 is the timer chip in every beginner’s kit, and it has no clock of its own at all. Inside it are three equal resistors from the supply to ground, setting two comparator trip points at one third and two thirds of the supply, an internal flip-flop, an open-collector discharge transistor and an output stage; every timing interval it produces comes entirely from the resistor and capacitor a circuit wires around it. Below about 4.5 volts on the supply the chip is unpowered and its output pins sit high, not driving anything, exactly like a chip that has not been plugged in. Comparator crossings reach the output 100 nanoseconds later, the datasheet’s own typical figure, and the control pin genuinely moves both trip points if something is wired to it, rather than being decorative. The astable and monostable circuits people build around this chip are entirely resistor-and-capacitor math; the chip itself only compares and switches.

Family: Timers and analog
Pins: 8

Pins

8 pins

Named as the editor names them, so a wire lands where you expect it.

Role

What it does

GND

Input or output

0 V reference.

TRIG

Input

Sets the flip-flop when it falls below a third of the supply.

OUT

Output

High or low, a bipolar totem-pole output.

RESET

Input

Below about 0.7 V, forces the output low regardless of the comparators.

CTRL

Input or output

The upper threshold tap: normally two-thirds of the supply, movable.

THR

Input

Resets the flip-flop when it rises above the upper threshold.

DIS

Input or output

Open-collector, saturated to GND while the output is low.

VCC

Input or output

Supply, 4.5 V or more.

How to use it

How to wire a 555 timer as a blinker

In astable mode the 555 runs on its own, with no microcontroller. The capacitor charges through R1 and R2 to two thirds of the supply, then discharges through R2 alone into the DIS pin down to one third, over and over, and OUT is high while it charges. The frequency is 1.44 / ((R1 + 2 R2) C).

The circuit here uses R1 = 10 k and a 10 uF capacitor, with a slide switch that picks R2 = 47 k (1.4 Hz) or 4.7 k (7.4 Hz), so the LED on OUT visibly changes speed while it runs. Tie RESET (pin 4) to the supply, or the chip stays stopped.

Part pin

Board pin

VCC (pin 8) and RESET (pin 4)

5 V

GND (pin 1)

GND

DIS (pin 7)

R1 (10 k) to 5 V, and R2 to THR and TRIG

THR (pin 6) and TRIG (pin 2)

Joined, and the 10 uF capacitor to GND

OUT (pin 3)

220 ohms and the LED to GND

OUT can source or sink up to 200 mA, so the same circuit drives a small buzzer or a relay coil directly. With a board in the circuit, a pin can watch OUT or drive RESET to start and stop it.

555 blinkerlive0.000 s 0.00x

Hold the button

This is the simulator itself, running here. Click anything to open it in the editor.

Open this project in the editor Read the full tutorial

How it is modeled

What is true about the NE555 timer, here

In its help article’s own words: what the simulation gets right, and where it stops.

Modeled

CTRL really is the control pin: the chip drives it with its own internal divider, so a decoupling capacitor there behaves as it does on the bench, and forcing a voltage onto CTRL genuinely moves both trip points. Below 4.5 V the chip is not running and OUT/DIS go high impedance, the way an unplugged chip would. OUT's high is a diode drop and a transistor drop below the rail (about 3.3 V on a 5 V supply) because it is a real bipolar totem pole, not an idealized rail-to-rail driver. The timing accuracy is the capacitor's, not the chip's, and the capacitor is solved by the matrix rather than stepped: a textbook astable measures 0.05% fast against 1.44 / ((RA + 2 RB) C) at 4.7 k, 10 k and 47 k of RB alike, held by a test in crates/parts/src/parts/ne555.rs. A one-shot on 10 k and 10 uF runs for RC ln 3 = 109.8 ms, within a twentieth of a percent.

Not modeled

The discharge transistor's 10 ohms is not in the textbook formula, and it is in this model. Where RA is small (a 1 k RA against a 10 k RB), that 10 ohms moves the frequency about 1% below what 1.44 / ((RA + 2 RB) C) says. The model is right and the formula is the approximation, but a lesson that checks the formula to better than a percent should know which of the two it is testing.

The output levels are fixed numbers rather than load-dependent ones: the high is always VCC − 1.7 V and the low always 0.1 V, where a real bipolar 555's drops depend on how much current the pin is passing. The comparator delay is a flat 100 ns from a crossing to the pin, inertial, which is the datasheet's output rise and fall time standing in for the whole path. Below 4.5 V of supply the chip simply stops rather than degrading, and there is no supply current, no internal noise, no temperature drift of the trip points, and no CMOS-variant (7555) behavior.

From NE555 timer, in full.

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