Inverter (ideal)
One ideal inverter: the companion to the ideal gate, with no supply pins and no chip behind it.
Y is simply the opposite of A, drawn as the ANSI triangle-and-bubble symbol,
driving from nowhere the way clock does.
Pins
| Pin | What it does |
|---|---|
A |
Input. |
Y |
The opposite of A. |
Properties
None.
What the model gets right
An inverter with nothing on its input genuinely has nothing to say about its output:
unknown or floating A gives unknown Y, which is the same rule every gate in the
library follows. Chain three of these into a loop and it oscillates, because the delay
is inertial and a stage cannot answer its own input instantly.
What it does not model
No supply pins and no unpowered state. The delay is a flat 10 ns that comes from nowhere, not from any datasheet, so a ring oscillator built from three of these runs at 1 / (6 × 10 ns) = 16.7 MHz, which is a number about this part rather than a number about any real chip. There is no rise or fall time, no fan-out limit and no supply dependence. For a chip with a real supply and a delay off its own datasheet, see the 74HC logic family, which includes the hex inverter, 74HC04.
Common mistakes
Using this where the lesson is about a real chip needing power before it does anything. The ideal inverter always works, which is exactly why it is the wrong part to teach that lesson with.
See it in action
NAND latch and Gate lab both use ideal logic to keep the circuit's focus on boolean behavior. Browse /templates for more.