The 74HC32 quad OR in brief
What it is, and every setting the properties panel gives it.
The 74HC32, the 7432 in older kits, is four two-input OR gates in a 14-pin DIP laid out pin for pin like the 74HC08 and 74HC00, so swapping one chip for another on a breadboard changes the logic and nothing else: inputs A and B and output Y for each gate, ground on pin 7, supply on pin 14. Each output is high when either input is high; a high on one input forces the output high even with the other floating, and only two lows give a low. Inputs can come straight from Uno pins or other 74HC outputs. Leaving a real CMOS input floating is the classic mistake, since it drifts and the output chatters; Mokxi shows that input as unknown rather than guessing a level. For an ESP32, set the model property to 74HCT32, whose inputs switch at 1.4 volts so a 3.3 volt pin is a clean high; 74LS32 behaves as old TTL, with an output high near 3.4 volts. The delay is 9 nanoseconds, inertial. In the full adder template it ORs the two AND terms into the carry out.
- Family
- Logic
- Pins
- 14
- model
- 74HC32 (or 74HCT32, 74LS32)
14 pins
Named as the editor names them, so a wire lands where you expect it.
Input8
- 1A
- 1B
- 2A
- 2B
- 3A
- 3B
- 4A
- 4B
Output4
- 1Y
- 2Y
- 3Y
- 4Y
Input or output2
- GND
- VCC
How to use a 74HC32 OR gate in a full adder
The 74HC32 has four two-input OR gates: an output is high when either input is high, and low only when both are low. A full adder carries when A and B are both 1, or when Cin is 1 and exactly one of A and B is. Those are two AND terms, and one OR gate joins them into the carry out.
The circuit here uses one of the four gates. Its inputs come from the two AND outputs of the 74HC08, its output drives the carry LED through 220 ohms, and pins 14 and 7 go to 5 V and GND. Try A and B both 1, then only B with Cin: the carry lights either way, through a different input of the OR each time.
The 74HC32 and the 74HC08 share a pinout, so a misread part number on a real breadboard gives the wrong logic with no other symptom. The model setting also offers the 74HCT32, for 3.3 V inputs, and the 74LS32.
What is true about the 74HC32 quad OR, here
In its help article’s own words: what the simulation gets right, and where it stops.
74HC32: quad 2-input OR gate
The 7432, same package and pinout again, four OR gates. A 1 on either input forces
Y high. Propagation delay: 9 ns typical. See it in: Full adder.
Not modeled
One typical delay, and nothing around it. Each chip carries a single propagation
delay taken from its datasheet's typical column at VCC = 5 V, CL = 15 pF and
25 °C, and uses it for every path through the package. There is no minimum or maximum,
no spread between the gates in one chip, no rise or fall time, no output slew and no
dependence on supply voltage, load capacitance or temperature, all of which a real
74HC part has, and all of which a datasheet gives ranges for. On the 74HC595 the one
figure is the STCP-to-Qn number used for SHCP and MR to Q7S as well, which
the datasheet lists a nanosecond or two apart.
No setup, hold or pulse-width checks. The 74HC74 and the 74HC595 take a clock edge whenever they see one; nothing here refuses data that changed too close to the edge or a clock pulse that was too narrow, and nothing warns about it. A real part would metastable or simply miss.
No supply current, no output current limit and no bus contention damage. An output driving into another output is resolved as two drivers on one net; nothing gets hot.
Sequential parts power up cleared rather than random, because a toggle divider fed Unknown never escapes it. See how faithfully a part behaves.
From The 74HC logic family, in full.
See the 74HC32 quad OR in a project
One built-in project uses it. It opens in the editor, already wired.
Where it turns up in a lesson
3 lessons place it in their own circuits.
The rest of the bench
Every one of these is drawn and simulated the same way.
Wire up the 74HC32 quad OR
Open the editor and push it into the breadboard. It is free, and it runs on your own machine.