Half adder and full adder, from truth table to breadboard
- 192parts on the bench
- 25boards running now
- 1.00xreal time, on every board
Adding two one-bit numbers has four cases, and only one of them needs a carry: 1 + 1 = 10 in binary. The sum bit is 1 when exactly one input is 1, which is XOR. The carry bit is 1 when both are, which is AND. That pair of gates is a half adder, and it is running above: a 74HC86 for the sum and a 74HC08 for the carry, with two slide switches as A and B.
Slide a switch to the left, toward the leg wired to 5 V, for a 1. The green LED is the sum and the red LED is the carry. We ran all four rows, and the LEDs match the table below on every one.
The half adder
A B, carry sum: 0 0 gives 0 0. 0 1 gives 0 1. 1 0 gives 0 1. 1 1 gives 1 0. Sum = A XOR B and carry = A AND B.
On the breadboard, each chip straddles the center channel. Pins 1 and 2 are the first gate’s inputs and pin 3 is its output, on both the 74HC86 and the 74HC08. Pin 14 goes to 5 V and pin 7 to ground. Leave either supply wire off and the chip’s outputs float instead of reading 0, which is the most common reason a first adder does nothing.
It is called half an adder because it has no carry input. It can add the lowest bits of two numbers, but not any bit above them, since those also have to add the carry coming up from below.
The full adder
A full adder takes three inputs, A, B and a carry-in, and produces a sum and a carry-out. Sum = A XOR B XOR Cin: two XOR gates in series. Carry-out = AB + Cin(A XOR B): two ANDs and an OR. Written as a truth table it has eight rows, and the carry-out is 1 on exactly the four rows where two or more inputs are 1, which makes it the same function as a majority vote.
The full adder circuit uses three chips: the 74HC86 for both XORs, the 74HC08 for both ANDs and one gate of a 74HC32 for the OR. Every chip has its own supply wired. Test all eight rows; if one row is wrong, the switches tell you which inputs to trace.
Chaining them: a 2-bit ripple-carry adder
To add two-bit numbers, use a half adder for bit 0 and a full adder for bit 1, and wire bit 0’s carry-out into bit 1’s carry-in. That one wire is the ripple. The circuit needs three XORs, three ANDs and one OR, which fit in one 74HC86, one 74HC08 and one gate of a 74HC32.
We checked it: 01 + 01 lights S1 alone, which is 010. 11 + 11 lights C2 and S1, which is 110. 11 + 01 lights C2 alone, which is 100. Chain eight stages the same way and you have the adder in an 8-bit processor.
Why the carry is the slow part
Each gate takes a few nanoseconds to respond. In a ripple-carry adder the top bit’s answer cannot settle until the carry has passed through every stage below it, so the delay grows with the number of bits. For two bits nobody notices. For 32 or 64 bits it matters, which is why processors use carry-lookahead adders that compute the carries in parallel. The ripple version is still the one to learn first, because the lookahead version is the same logic rearranged.
From adding to subtracting
The same adder can subtract, which is how most processors do it. Computers store negative numbers in two’s complement: to get minus B, flip every bit of B and add 1. So A − B is A plus the flipped B, plus 1, and an adder already has a place to put that 1: the carry-in of the lowest stage.
Flipping bits on command is a job for XOR. A XOR 0 is A, and A XOR 1 is NOT A, so an XOR gate works as an inverter you can switch on and off. Put one XOR in front of each B input, tie their second inputs together as a SUB line, and tie SUB to the lowest carry-in as well. With SUB at 0 the circuit adds. With SUB at 1 it inverts B and adds the extra 1, so it subtracts.
For the 2-bit adder above that takes two more XOR gates. The 74HC86 has four, so a second 74HC86 covers them with room to spare, and the carry-out of the top stage becomes the borrow flag: 1 means no borrow, 0 means B was bigger than A.
Mistakes worth making once
Unused gate inputs on a real 74HC chip should be tied to ground or 5 V, not left open, because a floating CMOS input can drift and draw current. In these circuits the spare gates are left open to keep the wiring readable, and the simulator shows their outputs as unknown, which is honest. Two more to watch for: an output wired to another output instead of an input, and a switch whose center pin is not the one going to the chip. The center pin is the one that moves.
Questions
What is the difference between a half adder and a full adder?
A half adder adds two bits. A full adder adds two bits and a carry-in from the stage below, so full adders can be chained into a wider adder and half adders cannot.
How many gates does a full adder need?
Five in the usual form: two XOR, two AND and one OR. It can also be built from nine NAND gates, since NAND alone can make any logic function.
Which 74HC chips do I need?
A 74HC86 (quad XOR), a 74HC08 (quad AND) and a 74HC32 (quad OR). A half adder needs only the first two.
Build this for real
Open the editor, change a value and watch the number move with it. Nothing to install, and no account needed.