The 74HC08 quad AND in brief
What it is, and every setting the properties panel gives it.
The 74HC08, the chip many kits still list as the 7408, holds four two-input AND gates in a 14-pin DIP on the same pinout as the 74HC00: gate one is pins 1 to 3 (1A, 1B, 1Y), gate two pins 4 to 6, gates three and four sit on pins 8 to 13 with each output first, GND is pin 7 and VCC pin 14. An output goes high only when both inputs are high, and a low on either input pulls it low by itself, even if the other input is floating. From an Arduino Uno, put VCC on 5V and drive the inputs straight from digital pins. From an ESP32 the catch is levels: Mokxi’s 74HC switches at half its supply, so 3.3 volts reads high here, but a real 74HC on 5 volts wants about 3.5 for a guaranteed high. Run the chip from 3.3 volts, or set the model property to 74HCT08, whose inputs switch at 1.4 volts. A 74LS08 reads a floating input as high, as TTL does. In the full adder template it builds the two carry terms a 74HC32 then joins.
- Family
- Logic
- Pins
- 14
- model
- 74HC08 (or 74HCT08, 74LS08)
14 pins
Named as the editor names them, so a wire lands where you expect it.
Input8
- 1A
- 1B
- 2A
- 2B
- 3A
- 3B
- 4A
- 4B
Output4
- 1Y
- 2Y
- 3Y
- 4Y
Input or output2
- GND
- VCC
How to use a 74HC08 AND gate in a full adder
The 74HC08 has four two-input AND gates: an output is high only when both its inputs are high. In an adder that is the carry rule, since two ones make a carry, so a full adder needs two of them: one for A and B, and one for Cin and the half sum, A xor B.
In the circuit here the first AND gate shares its inputs with the 74HC86’s first XOR, the second takes that XOR’s output and Cin, and both outputs run into a 74HC32. Pin 14 goes to 5 V and pin 7 to GND. Set A and B to 1 and 1Y goes high on its own, before the OR passes it on to the carry LED.
Tie the inputs of unused gates to GND rather than leaving them floating. To drive the inputs from an ESP32’s 3.3 V pins with the chip on 5 V, set the model to 74HCT08.
What is true about the 74HC08 quad AND, here
In its help article’s own words: what the simulation gets right, and where it stops.
74HC08: quad 2-input AND gate
The 7408, same package and pinout as the 74HC00, four AND gates instead of four
NANDs. A 0 on either input forces Y low. Propagation delay: 9 ns typical. See it
in: Full adder.
Not modeled
One typical delay, and nothing around it. Each chip carries a single propagation
delay taken from its datasheet's typical column at VCC = 5 V, CL = 15 pF and
25 °C, and uses it for every path through the package. There is no minimum or maximum,
no spread between the gates in one chip, no rise or fall time, no output slew and no
dependence on supply voltage, load capacitance or temperature, all of which a real
74HC part has, and all of which a datasheet gives ranges for. On the 74HC595 the one
figure is the STCP-to-Qn number used for SHCP and MR to Q7S as well, which
the datasheet lists a nanosecond or two apart.
No setup, hold or pulse-width checks. The 74HC74 and the 74HC595 take a clock edge whenever they see one; nothing here refuses data that changed too close to the edge or a clock pulse that was too narrow, and nothing warns about it. A real part would metastable or simply miss.
No supply current, no output current limit and no bus contention damage. An output driving into another output is resolved as two drivers on one net; nothing gets hot.
Sequential parts power up cleared rather than random, because a toggle divider fed Unknown never escapes it. See how faithfully a part behaves.
From The 74HC logic family, in full.
See the 74HC08 quad AND in a project
One built-in project uses it. It opens in the editor, already wired.
Where it turns up in a lesson
4 lessons place it in their own circuits.
The rest of the bench
Every one of these is drawn and simulated the same way.
Wire up the 74HC08 quad AND
Open the editor and push it into the breadboard. It is free, and it runs on your own machine.