74HC595 shift register
Eight outputs from three pins. Shift a byte in and latch it.
- 16 pins
Every one of its 16 pins
What it does
The 74HC595 turns three signal pins into eight outputs, and the trick to understanding it is that there are genuinely two separate eight-bit registers inside. The shift register moves on every rising edge of SHCP, dropping whatever is on DS into the first stage and pushing everything else along by one; do that eight times and it holds a full byte. The storage register, the latch, is the one Q0 through Q7 actually show, and it only changes on a rising edge of STCP, which copies the shift register into it in one step. That is why the outputs sit completely still while a byte is clocked in and jump together only at the latch edge. MR clears the shift register alone, asynchronously, leaving the latch untouched; OE three-states all eight outputs without touching either register. Every edge carries the datasheet’s typical 15 nanosecond propagation delay before the pins actually move.
What is true about the 74HC595 shift register, here
74HC595: 8-bit shift register with output latch
The chip everyone reaches for when they run out of pins. Two registers inside it:
an eight-stage shift register clocked by SHCP, which moves everything along and
drops DS into stage 0 on a rising edge; and a storage register (the latch), which
is what Q0–Q7 actually show and which only changes on a rising edge of STCP.
MR (active low) clears the shift register without touching the latch; OE
(active low) three-states the outputs without touching either register, so a
disabled chip still shifts and its last byte is unharmed underneath. Both registers
power up cleared. Propagation delay: 15 ns typical, STCP to Qn. See it in:
LED bar chaser.
Not modeled
One typical delay, and nothing around it. Each chip carries a single propagation
delay taken from its datasheet's typical column at VCC = 5 V, CL = 15 pF and
25 °C, and uses it for every path through the package. There is no minimum or maximum,
no spread between the gates in one chip, no rise or fall time, no output slew and no
dependence on supply voltage, load capacitance or temperature, all of which a real
74HC part has, and all of which a datasheet gives ranges for. On the 74HC595 the one
figure is the STCP-to-Qn number used for SHCP and MR to Q7S as well, which
the datasheet lists a nanosecond or two apart.
No setup, hold or pulse-width checks. The 74HC74 and the 74HC595 take a clock edge whenever they see one; nothing here refuses data that changed too close to the edge or a clock pulse that was too narrow, and nothing warns about it. A real part would metastable or simply miss.
No supply current, no output current limit and no bus contention damage. An output driving into another output is resolved as two drivers on one net; nothing gets hot.
Sequential parts power up cleared rather than random, because a toggle divider fed Unknown never escapes it. See how faithfully a part behaves.
From The 74HC logic family, in full.
See the 74HC595 shift register in a project
Shown here on: Arduino Uno R3
Where it turns up in a lesson
In the twelve week course
In a learn article
The rest of the bench
Every one of these is drawn and simulated the same way.
Wire up the 74HC595 shift register
Open the editor and push it into the breadboard. It is free, and it runs on your own machine.