Source: https://mokxi.com/docs/editor/spice
Updated: 2026-09-28

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Docs / The editor / SPICE netlists

# SPICE netlists

Run a SPICE deck and plot the results, export a circuit as a .cir file, or
import a netlist as parts and wires.

## Where it is

Run a SPICE deck… is in the editor's menu. Download SPICE and Open
JSON or SPICE… are in the Save menu: the first writes a file, the second
reads one. A file ending in .cir, .sp or .spice is read as a netlist;
anything else is read as a Mokxi project.

## Run a deck

Run a SPICE deck… opens a sheet with the deck in a text box. Paste one, pick
one from Examples..., or press Open files and choose the deck together
with any files it .includes. Press Run. Each analysis comes back as a
result you pick from the list: a transient or a sweep as waveforms, with a box
for every node voltage and branch current, an AC analysis as a Bode plot of
gain and phase, a noise analysis as its spectrum, and an operating point,
.tf or .meas as a table. Download CSV saves the result on screen.

What it reads. A title line, * and ; comments, + continuations and
SPICE's scale suffixes; .param with expressions and .func; .subckt and
.ends with parameters, nested to any depth; .include and .lib of the files
you opened with it; .model cards; .ic, .nodeset, .options, .temp,
.step and .end. Elements: R, C, L and K; independent V and I
sources with DC, AC, SIN, PULSE, PWL, EXP, SFFM and AM; the
controlled sources E, F, G and H, including POLY; B sources with
the usual functions of v(), i() and time; S and W switches; T
lossless transmission lines; D diodes with breakdown, capacitance and series
resistance; Q Gummel-Poon bipolar transistors with the Early effect and
junction capacitances; J JFETs; M MOSFETs of levels 1, 2 and 3 with their
capacitances; and X subcircuit instances.

The analyses. .op; .tran, with UIC and a maximum step; .ac over
dec, oct or lin; .dc, with a second, nested sweep; .tf; .noise; and
.meas in its common forms (TRIG/TARG, WHEN, FIND, AVG, RMS, MIN,
MAX, PP, INTEG). An operating point that plain Newton-Raphson cannot find
is found by gmin stepping, source stepping or pseudo-transient continuation, and
the result says which it needed.

How far to trust it. The engine is checked against ngspice 42 on 42
benchmark circuits, from a voltage divider and RC, RL and RLC filters through
rectifiers, a Zener regulator, transistor and MOSFET amplifiers, a
differential pair, current mirrors, op-amp amplifiers, integrators and active
filters, to oscillators, a latch, a Schmitt trigger and a buck converter. Every
one agrees within a stated tolerance: DC values within 1% or 1 mV, AC within
0.1 dB and 1 degree, waveforms within 1% of their range (2% for switching
waveforms), oscillator frequencies within 1%. The same checks run on every
change to the engine.

What it does not do. MOSFET models above level 3 (BSIM), MESFETs, lossy
transmission lines, XSPICE and digital devices, Laplace and frequency-table
sources, and the .four, .sens, .pz and .disto analyses. A deck that uses
one gets a message naming the line. MOSFET level 3's KAPPA differs from
ngspice's by up to about 4% in saturation, and level 2 does not model VMAX,
DELTA, XJ or NFS (a card that sets them is warned about).

A deck runs on its own, apart from the canvas: the circuit on the canvas is not
changed, and the deck's parts do not appear on it. To turn a netlist into parts
and wires, import it (below).

## Export

The file is an ngspice deck that runs as it is: ngspice -b circuit.cir. It
holds:

In Mokxi
In the file

resistor, capacitor, inductor
R, C, L

potentiometer, slide pot
two resistors, with the wiper at mid travel

vcc, bench supply
a DC V source

signal generator, function generator
a V source: SIN for a sine, PULSE for a square, triangle or sawtooth

multimeter on a current range
a zero-volt V source, which is SPICE's ammeter

diode, Zener, LED
D, with a .model card

transistor
Q, with an NPN or PNP .model card

MOSFET
M with its body on its source, W=1 L=1, and a level 1 NMOS or PMOS card

op-amp
X, an instance of a subcircuit for its model

The model cards are the engine's own. Each .model card is written by the
engine from the device it builds for that part's model, so a 1N4148 in the file
has the same Is, N, Rs, junction capacitance and transit time as the one
Mokxi solves. A property you set on the part that the card can carry goes into
it: a transistor's beta becomes Bf, and a MOSFET's vto, beta and
lambda become Vto, Kp and Lambda. That part then gets a card of its own,
named after it. An override the card cannot carry (a diode's forward, a
Zener's vz) is named in a * NOTE line.

The op-amp is its macromodel. Each op-amp model used gets one subcircuit
(OPAMP_741, OPAMP_RAIL_TO_RAIL and so on), and each op-amp is an instance of
it with its resolved numbers on the line: open-loop gain, gain-bandwidth
product, slew rate, offset, headroom, negative rail, current limit and output
resistance. Inside it is the same single pole, swing clamp and current limit the
engine solves. A 741 in a non-inverting gain of 11 exported this way has its
3 dB corner within 1% of Mokxi's own in ngspice.

The run. The file ends with .op and a .tran. The run is as long as the
widest scope window in the circuit, or five periods of the slowest generator,
or 10 ms. If you set a longest step in Analysis… (the time step), it is the
.tran line's fourth number, TMAX. A .print line lists the scope channels
and op-amp outputs.

What is left out. A board, a logic gate, a display, a sensor or anything else
with no SPICE element is left out, and the file says so in a comment line that
names the part and why: * OMITTED uno1 (uno): a board runs firmware, which SPICE cannot. Instruments that only watch (a scope, a voltmeter) are listed in
* INSTRUMENT lines with the nodes they watch. The TIP120 Darlington is left out
too, since it is two transistors and a diode and has no one-card form. After a
download, the note over the canvas says how many parts were left out, and
What lists them.

Nodes are called n1, n2 and so on in the order the file first uses them, and
ground is 0. A .options rshunt=1e12 line puts a teraohm from every node to
ground, so a node left hanging by an omitted part cannot stop ngspice from
solving.

## Import

The importer reads the same set back, from a Mokxi file or from a textbook deck:

- R, C, L with SPICE's scale suffixes (4.7k, 100n, 10meg);

- V sources: a DC source to ground becomes a supply (vcc), a floating one a
bench supply, SIN and PULSE a signal generator, a zero-volt source a
multimeter on its current range, and a source with an AC magnitude a
generator you can drive from Frequency response;

- D, Q and M with their .model cards;

- X instances of Mokxi's own op-amp subcircuits, with their numbers;

- .tran, whose TMAX becomes the transient's longest step.

A model card from Mokxi comes back as the same part model. A card from anywhere
else is matched by name when it names one of Mokxi's models, and otherwise
becomes the nearest part: an NPN card becomes a 2N2222 with the card's Bf as
its beta, and an NMOS card a 2N7000 with its Vto, Kp W / L and Lambda.
A diode card that is not one of Mokxi's becomes the default diode, and its
parameters are not carried.

Nothing is dropped without a word. An element or statement the importer does
not read is named: a current source (Mokxi has no current source part), a
controlled source (E, F, G, H, B), a switch, a subcircuit that is not
Mokxi's own, .param, .include, and a value it cannot read. They are listed in
the Serial panel, and the note over the canvas has a What button that lists
them in full.

The layout. A netlist has no picture, so the importer draws a first one: the
sources in a column on the left, every other part in a column by how many parts
stand between it and a source, a ground symbol under every pin that goes to
ground, and the wires routed by Tidy wires. It
is a starting point to move things about from, not a finished schematic.

## Round trip

Export, import and export again gives the same netlist: the same elements, the
same values and cards, joined in the same way. What changes is the picture, the
part names where a deck numbered them, and anything that was never in the file:
instruments, boards, and a scope's window.

### On this page

Where it is Run a deck Export Import Round trip
